Detail publikace

CMOS Circuits Fault Simulation

RECMAN, M.

Originální název

CMOS Circuits Fault Simulation

Typ

článek ve sborníku ve WoS nebo Scopus

Jazyk

angličtina

Originální abstrakt

The testibility of failures modeled by bridges and opens in CMOS operational amplifier is investigated. The functional (voltage of the output node) and current (supply current) effects caused by these types of failures in the circuit under test are presented. The correlated statistical models of individual MOS devices are used for fault simulatin. The proper number of Monte Carlo runs simulates technological spreads in output voltage and supply current. The scatter plots of these electrical variables then give the first information on fault detectibility using functional, supply current or combined technique.

Klíčová slova

fault simulation, testing, diagnosis, CMOS analog circuits, fault modeling, circuit simulation

Autoři

RECMAN, M.

Rok RIV

2003

Vydáno

1. 1. 2003

Nakladatel

Novotný-Brno

Místo

Brno

ISBN

80-214-2461-3

Kniha

Proceedings of the Socrates Workshop 2003

Strany od

129

Strany do

135

Strany počet

7

BibTex

@inproceedings{BUT9407,
  author="Milan {Recman}",
  title="CMOS Circuits Fault Simulation",
  booktitle="Proceedings of the Socrates Workshop 2003",
  year="2003",
  pages="7",
  publisher="Novotný-Brno",
  address="Brno",
  isbn="80-214-2461-3"
}