Publication detail

An Area-Efficient Alternative to Adaptive Median Filtering in FPGAs

VAŠÍČEK, Z. SEKANINA, L.

Original Title

An Area-Efficient Alternative to Adaptive Median Filtering in FPGAs

Type

article in a collection out of WoS and Scopus

Language

English

Original Abstract

This paper presents a new approach to the FPGA implementation of image filters which are utilized to remove the salt-and-pepper noise of high intensity (up to 70% of corrupted pixels). The proposed solution combines image filters designed by means of evolutionary algorithm with a simple human-designed preprocessing and post-processing unit. It provides the same filtering capability as a standard adaptive median filter; however, using four times less Virtex slices.

Keywords

image filter, FPGA, evolutionary design

Authors

VAŠÍČEK, Z.; SEKANINA, L.

RIV year

2007

Released

28. 8. 2007

Publisher

IEEE Computer Society

Location

Los Alamitos

ISBN

1424410606

Book

Proc. of 2007 International Conference on Field Programmable Logic and Applications

Pages from

216

Pages to

221

Pages count

6

URL

https://www.fit.vut.cz/research/publication/8398/

BibTex

@inproceedings{BUT28818,
  author="Zdeněk {Vašíček} and Lukáš {Sekanina}",
  title="An Area-Efficient Alternative to Adaptive Median Filtering in FPGAs",
  booktitle="Proc. of 2007 International Conference on Field Programmable Logic and Applications",
  year="2007",
  pages="216--221",
  publisher="IEEE Computer Society",
  address="Los Alamitos",
  isbn="1424410606",
  url="https://www.fit.vut.cz/research/publication/8398/"
}

Documents

T1C_1.PDF