Course detail

Advanced Digital Systems

FIT-PCSAcad. year: 2017/2018

Combinatorial and sequential logic design techniques, algorithms, and tools review. Review of digital design target technologies (ASIC, FPGA). Algorithms for minimization of digital circuits. Advanced synthesis techniques (pipelining, retiming). Constraint conditions. Modern approaches to synthesis of digital circuits (models, methods, logic optimization, optimization for target technology). Synergy of modern syntehesis and verification. Low power design methodologies. Reconfigurable computing. Verification of digital circuits (OVM methodology).

Language of instruction

Czech

Number of ECTS credits

5

Mode of study

Not applicable.

Guarantor

doc. Dr. Ing. Otto Fučík

Department

Department of Computer Systems (UPSY)

Learning outcomes of the course unit

The students are able to design complex constrained digital systems using contemporary design techniques and they know modern methods for synthesis and verification of these systems.

Prerequisites

Digital system design, basic programming skills.

Co-requisites

Not applicable.

Planned learning activities and teaching methods

Not applicable.

Assesment methods and criteria linked to learning outcomes

Study evaluation is based on marks obtained for specified items. Minimimum number of marks to pass is 50.

Requirements for class accreditation are not defined.

Course curriculum

    Syllabus of lectures:
    • Combinatorial and sequential logic design techniques, algorithms, and tools review.
    • Review of digital design target technologies (ASIC, FPGA).
    • Algorithms for minimization of digital circuits.
    • Advanced synthesis techniques (pipelining, retiming).
    • Constraint conditions.
    • Models and methods for modern synthesis of digital circuits (AIG, BDD, SAT solvers).
    • Modern synthesis of digital circuits (logic optimization).
    • Modern synthesis of digital circuits (optimization for target technology).
    • Synergy between synthesis and verification of digital circuits.
    • Low power design methodologies.
    • Reconfigurable computing.
    • Verification of digital circuits (OVM methodology).

    Syllabus of computer exercises:
    • Synthesis of the basic logic circuits, pipelining, retiming.
    • Constraint conditions.
    • Synthesis of basic digital circuits using ABC tool.
    • Synthesis of advanced digital circuits using ABC tool.
    • Verification of digital circuits.

    Syllabus - others, projects and individual work of students:
    • Individual project focused on digital design using CatapultC environment.

Work placements

Not applicable.

Aims

To give the students the knowledge of advanced digital systems design including hardware description languages, professional CAD tools, techniques for constrained design, and PLD technology.

Specification of controlled education, way of implementation and compensation for absences

Written mid-term exam and project in due dates.

Recommended optional programme components

Not applicable.

Prerequisites and corequisites

Not applicable.

Basic literature

Micheli G., High-Level Synthesis from Algorithm to Digital Circuit, ISBN 978-1-4020-8587-1, 2008 (EN)

Recommended reading

Khatri S. P., Gulati K. (eds.): Advanced Techniques in Logic Synthesis, Optimizations and Applications, ISBN 978-1-4419-7517-1, 2011 (EN)
Rabaey J., Pedram M.: Low Power Design Methodologies, Kluwer, ISBN 0792396308, 1996 (EN)

Classification of course in study plans

  • Programme IT-MSC-2 Master's

    branch MBI , 0 year of study, winter semester, compulsory-optional
    branch MSK , 0 year of study, winter semester, elective
    branch MMM , 0 year of study, winter semester, elective
    branch MBS , 0 year of study, winter semester, elective
    branch MPV , 2 year of study, winter semester, compulsory
    branch MIS , 0 year of study, winter semester, elective
    branch MIN , 0 year of study, winter semester, elective
    branch MGM , 0 year of study, winter semester, compulsory-optional

Type of course unit

 

Lecture

26 hod., optionally

Teacher / Lecturer

doc. Dr. Ing. Otto Fučík

Syllabus

  • Combinatorial and sequential logic design techniques, algorithms, and tools review.
  • Review of digital design target technologies (ASIC, FPGA).
  • Algorithms for minimization of digital circuits.
  • Advanced synthesis techniques (pipelining, retiming).
  • Constraint conditions.
  • Models and methods for modern synthesis of digital circuits (AIG, BDD, SAT solvers).
  • Modern synthesis of digital circuits (logic optimization).
  • Modern synthesis of digital circuits (optimization for target technology).
  • Synergy between synthesis and verification of digital circuits.
  • Low power design methodologies.
  • Reconfigurable computing.
  • Verification of digital circuits (OVM methodology).

Exercise in computer lab

10 hod., optionally

Teacher / Lecturer

doc. Dr. Ing. Otto Fučík

Syllabus

  • Synthesis of the basic logic circuits, pipelining, retiming.
  • Constraint conditions.
  • Synthesis of basic digital circuits using ABC tool.
  • Synthesis of advanced digital circuits using ABC tool.
  • Verification of digital circuits.

Project

16 hod., optionally

Teacher / Lecturer

doc. Dr. Ing. Otto Fučík