English

Not applicable.

Of all faculties

The graduate is able to: (1) describe simple digital system using VHDL, (2) verify simple digital system using VHDL, (3) choose type of finite state machine and give reasons for the choice, (4) design and implement a finite state machine using VHDL, (5) compare different architectures of PLDs and choose a proper one for particular application, (6) specify timing requirements for a design and verify that they are met after implementation, (7) implement simple IP cores like memories and simple DSP blocks (FIR filtres), (8) implement simple microcontroller into FPGA, program it and use in target application, (9) state requirements on FPGA power supply system, (10) analyze and prevent/solve basic signal integrity issues.

Students are expected to know basic of impulse and digital technology: the Boolean algebra, Karnaugh maps, truth tables, function of basic gates and flip-flops (registers), principle and effect of signal propagation through active and passive transmission elements.

Not applicable.

Techning methods include lectures and computer laboratories. Course is taking advantage of e-learning (Moodle) system. The main focus is on computer laboratories with strong emphasis on practical skills.

Students obtain points for the activity in computer labs during the semester. The final exam is composed of written, practical and oral part. The exam will be in a remote form.

Lectures:
1. Introductiona to digital integrated circuits, history and development of CPLDs and FPGAs.
2. Introduction to VHDL programming language.
3. The basics of digital systems: gates, flip-flops, shift registers, counters.
4. Theory of finite state machines, Moor and Mealy state machines.
5. Practical design and application of finite state machines, microsequencers.
6. Basis architecture of FPGAs and CPLDs: logic cells, programmable interconnect, I/O cells.
7. Timing of digital circuits, metastability, methods for increasing clock frequency.
8. FPGA clock domains, clock enabling, clock management, synchronous and asynchronous reset.
9. Memory structures in FPGAs, use of RAM, ROM and FIFO.
10. Digital signal processing in FPGAs, dedicated blocks for DSP acceleration.
11. Advanced FPGA structural features, HARD and SOFT IP cores, implementation of basic IP cores.
12. Processors in FPGA, SoC, FPGA manufacturing technology, FPGA configuration.
13. Signal integrity, PCB and power design for FPGA, radiation effects.

Computer exercises:
1. Introduction to VHDL and ISE design tool.
2. Basic functions, combinational logic (decoding).
3. Hierarchical design, usage of schematic.
4. Implementation of sequential systems (counters).
5. State machines and their VHDL description.
6. Structural description, testbench, simulation.
7. LFSR counter, timing parameters, power consumption of FPGA.
8. Usage of IP cores.
9. Usage of ChipScope tool.
10. Microprocessors in FPGA - PicoBlaze, basic usage.
11. Microprocessors in FPGA - PicoBlaze, custom peripherals.
12. Microprocessors in FPGA - MicroBlaze.

Not applicable.

Lectures are aimed to teach students the basic principles of modern PLDs, particularly CPLDs and FPGAs, while they will be able not only to configure (program) them, but also select proper device and implement it into a system.

Evaluation of activities is specified by a regulation, which is issued by the lecturer responsible for the course annually.

Not applicable.

Not applicable.

MAXFIELD, C. FPGAs: Instant Access. Newnes, 2008. (EN)
MAXFIELD, C. The Design Warrior's Guide to FPGAs. Elsevier, 2004. (EN)
PONG, P.C. FPGA Prototyping by VHDL Examples: Xilinx Spartan-3 Version. Wiley-Interscience, 2008. (EN)

Not applicable.