Course detail

Digital Electronics

FEKT-BPA-DELAcad. year: 2022/2023

The course is an introduction to digital technology. Students will get acquainted with the basic division of digital circuits and Boolean algebra. The first part of the course is devoted to the design of combinational logic circuits, forms of their notation and implementation. The course follows the issue of sequential synchronous circuits. Individual elements of digital technology are also described using VHDL, which will allow students to gain practical experience with Hardware Description Language.

Language of instruction

English

Number of ECTS credits

5

Mode of study

Not applicable.

Guarantor

doc. Ing. Tomáš Frýza, Ph.D.

Department

Department of Radio Electronics (UREL)

Offered to foreign students

The home faculty only

Learning outcomes of the course unit

The graduate of the course will learn:
* The basics of digital circuits and combinational logic
* The principles of sequential logic and finite state machines
* Writing code in VHDL
* Designing testbenches
* Designing FPGA logic

Prerequisites

The course is designed for students with knowledge of the basics of electronic components, passive and semiconductor circuits. The advantage is a basic knowledge of the VHDL programming language.

A student of study programs in Czech language has passed BPC-AN4, BPC-AEI English – Intermediate 2 exam at UJAZ FEKT. This exam corresponds to the level B1 CEFR level.

Co-requisites

Not applicable.

Planned learning activities and teaching methods

Teaching methods include lectures, computer exercises, and practical laboratories. Students work on VHDL project during the course. All learning materials are available at BUT e-learning and MS Teams.

 

Assesment methods and criteria linked to learning outcomes

Out of a total of 100 points, 33 can be obtained during the semester (5 - online test, 8 - laboratory exercises, 20 - VHDL project) and 67 from the final exam. To pass the course you need to receive a score of 50% or more and pass the final exam.

Course curriculum

01 - Introduction to digital systems
02 - Representation and minimization of logic functions
03 - Implementation of logic functions
04 - Hazards in combinational circuits
05 - Sequential logic circuits
06 - Asynchronous and synchronous counters
07 - Finite state machines

Work placements

Not applicable.

Aims

The aim of the course is to present the fundamentals of the impulse and digital devices and to present the practical approaches of combinational, asynchronous, and synchronous systems design using VHDL.

Specification of controlled education, way of implementation and compensation for absences

Evaluation of activities is specified by a regulation, which is issued by the lecturer responsible for the course annually.

Recommended optional programme components

Not applicable.

Prerequisites and corequisites

Not applicable.

Basic literature

ASHENDEN, Peter J. The designer's guide to VHDL. 3rd ed. Boston: Morgan Kaufmann Publishers, c2008. ISBN 9780120887859. (EN)
FLOYD, T.L. Digital Fundamentals 11th Edition. Pearson, 2017. ISBN 978-9332584600. (EN)
CHU, Pong P. FPGA prototyping by VHDL examples: Xilinx MicroBlaze MCS SoC. Second edition. Hoboken: John Wiley & Sons, 2017. ISBN 978-1119282747. (EN)
MANO, M. Morris a Michael D. CILETTI. Digital design: with an introduction to the Verilog HDL, VHDL, and SystemVerilog. Sixth edition, Global edition. NY, NY: Pearson, [2019]. ISBN 978-1292231167. (EN)

Recommended reading

Not applicable.

Elearning

eLearning: currently opened course

Classification of course in study plans

  • Programme BPA-ELE Bachelor's

    specialization BPA-ECT , 2 year of study, summer semester, compulsory

  • Programme BPC-AUD Bachelor's

    specialization AUDB-TECH , 0 year of study, summer semester, compulsory-optional

  • Programme BPC-ECT Bachelor's 0 year of study, summer semester, compulsory-optional
  • Programme BPC-IBE Bachelor's 0 year of study, summer semester, compulsory-optional
  • Programme BPC-TLI Bachelor's 0 year of study, summer semester, compulsory-optional

  • Programme BPC-AUD Bachelor's

    specialization AUDB-ZVUK , 0 year of study, summer semester, compulsory-optional

Type of course unit

 

Lecture

13 hod., optionally

Teacher / Lecturer

doc. Ing. Tomáš Frýza, Ph.D.

Syllabus

01 - Introduction to digital systems
02 - Representation and minimization of logic functions
03 - Implementation of logic functions
04 - Hazards in combinational circuits
05 - Sequential logic circuits
06 - Asynchronous and synchronous counters
07 - Finite state machines

Exercise in computer lab

26 hod., compulsory

Teacher / Lecturer

Ing. Marek Honek

Syllabus

01 - Introduction to Git and VHDL
02 - Combinational logic
03 - Introduction to Vivado
04 - Seven-segment display decoder
05 - Latches and Flip-flops
06 - Binary counter
07 - Driver for multiple seven-segment displays
08 - Traffic light controller
09 - Project
10 - Project
11 - Project
12 - Project

13 - Project presentation

Elearning

eLearning: currently opened course