Course detail
Fault Tolerant Systems
FIT-SODAcad. year: 2024/2025
Principles of fault tolerance, data and circuit structures, coding techniques. Codes for control and correction of information, information redundancy. Linear block codes: Hamming codes, oarity codes. Matrix description of codes. Principles of finite fields construction. Cyclic codes: principles and properties, CRC, BCH and Reed-Solomon codes. Architecture of codes for Flash memories and CDROMs. Introduction to quantum computing, quantum-inspired wrror correction codes. Fault tolerance at VLSI level. Radiation safety and fault tolerance. Fault tolerant communication networks, distributed tolerant systems.
State doctoral exam - Final interview topics:
- Principe's, approaches and parameters of safe and fault tolerant systems.
- Parity codes, multidimensional parity codes, low-density parity codes, arithmentic codes, Raptor codes.
- Hamming codes, byte error correction codes, matrix notation of of coding and decoding.
- Cyclic codes, basic and fast CRC calculation.
- Galois finite field GF(n) construction, minimum polynomials.
- Construction and applications of BCH and RS codes.
- Time redundancy, radiation tolerant circuits and systems.
- Fault tolerance in VLSI structures - memories and multiprocessors, reconfiguration, fault and error containment.
- Fault tolerance in communication systems.
- Software implemented fault tolerance, Byzantine agreement.
Language of instruction
Mode of study
Guarantor
Department
Entry knowledge
Rules for evaluation and completion of the course
Additional sessions after cunsultations wuth the lecturer.
Final exam, project submission and presentation.
Aims
Skills and approaches to building fault tolerance using hardware and codes. To research new techniques and their applications.
To get know a novel approaches to ensure availability and safety of technical means.
Study aids
Prerequisites and corequisites
Basic literature
Recommended reading
Shokrollahi A., Luby M.: Raptor Codes, NOW Publishers, 2011
Szefer J.: Principles of Secure Processor Architecture Design, Morgan & Claypool, 2019
Classification of course in study plans
- Programme DIT Doctoral 0 year of study, summer semester, compulsory-optional
- Programme DIT Doctoral 0 year of study, summer semester, compulsory-optional
- Programme DIT-EN Doctoral 0 year of study, summer semester, compulsory-optional
- Programme DIT-EN Doctoral 0 year of study, summer semester, compulsory-optional
- Programme CSE-PHD-4 Doctoral
branch DVI4 , 0 year of study, summer semester, elective
- Programme CSE-PHD-4 Doctoral
branch DVI4 , 0 year of study, summer semester, elective
- Programme CSE-PHD-4 Doctoral
branch DVI4 , 0 year of study, summer semester, elective
Type of course unit
Lecture
Teacher / Lecturer
Syllabus
- FT design methodology, structures and techniques.
- Error control codes. Parity codes, multidimensional parity codes, arithmetic codes.
- Residue codes, Hamming codes, sparse parity codes. Raptor codes.
- Cyclic codes, Fire codes.
- Galois fields GF(n) and their construction, BCH and Reed-Solomon codes, byte error detection.
- Time redundancy, alternating logic.
- Reliability modeling, combinatorial models, MIL-HDBK-217. Markov reliability models.
- Safe systems.
- FT architectures.
- VLSI fault tolerance. Radiation fault tolerance.
- FT in computer units, in memorie, in computer and communication systems.
- Fault tolerant and secure control systems.
- Distributed FT systems.
- Software implemented fault tolerance.
Guided consultation in combined form of studies
Teacher / Lecturer