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FEKTAbbreviation: PP-FENAcad. year: 2011/2012
Programme: Electrical Engineering and Communication
Length of Study: 4 years
Profile
The objective of the study is to provide PhD education to MSc graduates in all partial fields and to create a cross-disciplinary overview of the present development, to develop theoretical foundations in the selected research area, to master the methods of scientific, to develop their creative abilities and to use them for the solution of research problems. This all should lead to a dissertation thesis, which will provide an original a significant contribution to the research status in the field of interest.
Key learning outcomes
Graduates of this program will acquire cross-disciplinary knowledge of and experience in technical and physical subjects on a high-quality theoretical level. Graduates are for their later independent research and development work equipped with the knowledge and experience from, in particular, physics of semiconductors, quantum electronics and mathematical modeling and will be able to independently solve problems associated with nanotechnologies. Potential job careers: research worker in basic or applied research and in the introduction, implementation and application of new prospective and economically beneficial procedures and processes in the field of electronics, electrical engineering, non-destructive testing and reliability and material analysis.
Occupational profiles of graduates with examples
Graduates of this program will acquire cross-disciplinary knowledge of and experience in technical and physical subjects on a high-quality theoretical level. Graduates are for their later independent research and development work equipped with the knowledge and experience from, in particular, physics of semiconductors, quantum electronics and mathematical modeling and will be able to independently solve problems associated with nanotechnologies. Potential job careers: research worker in basic or applied research and in the introduction, implementation and application of new prospective and economically beneficial procedures and processes in the field of electronics, electrical engineering, non-destructive testing and reliability and material analysis
Guarantor
prof. RNDr. Pavel Tománek, CSc.
Issued topics of Doctoral Study Program
Decreasing the dimensions in integrated circuits (currently 32 nm) brings about an increase of interconnect capacitance and thus the reduction of the signal propagation speed. The limiting factor for a further improvement of electronic device performance thus become not the properties of semiconductor devices themselves but rather interconnect delays and, hence, too high magnitudes of parasitic capacitances. One of the options for the reduction of interconnect capacitances is the reduction of the permittivity (dielectric constant, k) of thin-layer insulating layers (capacitance is directly proportional to permitivity). Two major routes are available: replacement of polar Si-O bonds with less polar Si-F or Si-C bonds or raising the porosity, i.e. intentional introduction of air voids. The newly developed low-k materials must, however, not limit the currently used silicon technologies and must be able to pass all manufacturing steps including temperatures up to about 1100°C. The work on this topic will require experimental work in sample preparation and design, studies of the theory of low-k dielectrics and the measurement of electrical properties of developed material systems. What is available: measurement equipment for the frequency range 10 - 10E9 Hz and the helium cryostat for the temperature range 10 - 500 K.
Tutor: Liedermann Karel, doc. Ing., CSc.
Materials exhibiting high permittivity (dielectric constant, k) are needed for new applications, particularly in integrated circuits (ICs) using the 32 nm technology and in capacitors. In capacitors, high-k dielectrics are used in order to attain higher energy densities in capacitors and thus to reduce the size of capacitors themselves. In ICs manufacturing, the present drive toward smaller dimensions results in the thinning of insulating layers, accompanied by an unwanted increase of leakage currents. In order to prevent this effect, higher gate thicknesses are desired which, however, because of the necessity to keep the capacitance constant, should exhibit higher dielectric constant than the pure SiO2. Materials for ICs should be used within the current silicon technologies and, therefore, they must be able to sustain all manufacturing steps without being damaged. Suitable dielectrics are mostly transition metal oxides, e.g. ZrO2, HfO2, Al2O3, Y2O3, La2O3, Ta2O5 etc. Moreover, all materials considered must be thermodynamically stable on silicon for a long time. In case of dielectrics for capacitors, the use of multilayer ceramic chip capacitors again necessitates the use of material that can withstand sintering temperatures. The work on this topic will require experimental work in sample preparation and design, studies of the theory of high -k dielectrics and the measurement of electrical properties of developed material systems. What is available: measurement equipment for the frequency range 10 - 10E9 Hz and the helium cryostat for the temperature range 10 - 500 K.