Ing.

Jitka Kocnová

FIT, VZ EHW – členka

+420 54114 1348
ikocnova@fit.vut.cz

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Ing. Jitka Kocnová

Publikace

  • 2022

    KOCNOVÁ, J.; VAŠÍČEK, Z. Delay-aware evolutionary optimization of digital circuits. In Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI. Nicosia, Cyprus: IEEE Computer Society, 2022. s. 188-193. ISBN: 978-1-6654-6605-9.
    Detail

  • 2021

    KOCNOVÁ, J.; VAŠÍČEK, Z. Resynthesis of logic circuits using machine learning and reconvergent paths. In 2021 24th Euromicro Conference on Digital System Design (DSD). Palermo: Institute of Electrical and Electronics Engineers, 2021. s. 69-76. ISBN: 978-1-6654-2704-3.
    Detail | WWW

  • 2020

    KOCNOVÁ, J.; VAŠÍČEK, Z. EA-based Resynthesis: An Efficient Tool for Optimization of Digital Circuits. Genetic Programming and Evolvable Machines, 2020, roč. 21, č. 3, s. 287-319. ISSN: 1389-2576.
    Detail | WWW

    KOCNOVÁ, J. EA-based Optimization of Digital Circuits. 2020. s. 0-0.
    Detail

  • 2019

    KOCNOVÁ, J.; VAŠÍČEK, Z. Towards a Scalable EA-based Optimization of Digital Circuits. In Genetic Programming 22nd European Conference, EuroGP 2019. Cham: Springer International Publishing, 2019. s. 81-97. ISBN: 978-3-030-16669-4.
    Detail | WWW

    KOCNOVÁ, J.; VAŠÍČEK, Z. EA-based refactoring of mapped logic circuits. In 2019 IEEE International Symposium on Circuits and Systems (ISCAS). Red Hook, NY: IEEE Computer Society Press, 2019. s. 1-5. ISBN: 978-1-7281-0397-6.
    Detail | WWW

    KOCNOVÁ, J.; VAŠÍČEK, Z. Impact of subcircuit selection on the efficiency of CGP-based optimization of gate-level circuits. In GECCO '19 Proceedings of the Genetic and Evolutionary Computation Conference Companion. New York: Association for Computing Machinery, 2019. s. 377-378. ISBN: 978-1-4503-6748-6.
    Detail | WWW

*) Citace publikací se generují jednou za 24 hodin.