Detail publikace

Modeling and Analysis of Fault-Tolerant Systems by Means of UPPAAL SMC: Method and Benefits

STRNADEL, J.

Originální název

Modeling and Analysis of Fault-Tolerant Systems by Means of UPPAAL SMC: Method and Benefits

Typ

článek ve sborníku mimo WoS a Scopus

Jazyk

angličtina

Originální abstrakt

The paper presents a method of modeling and analysis of fault-tolerant (FT) electronic systems by means of a novel statistical model checking (SMC) approach available in the UPPAAL SMC tool. The method can be seen as an alternative to classical analytic approaches based on instruments such as fault-tree or Markov reliability models of the above-specified systems. Main goal of the paper is to show that - taking the advantage of SMC - the reliability analysis of systems can be facilitated even for adverse conditions such as inconstant failure (hazard) rate of inner system components. In the paper, basic terms and principles related to modeling and analysis of FT systems are summarized, followed by a short introduction to the UPPAAL SMC tool, its practical applicability to analysis and modeling of basic FT systems and evaluation of the results achieved on basis of the tool.

Klíčová slova

modeling, analysis, fault tolerant, FT, statistical model checking, SMC, UPPAAL SMC, reliability analysis, probability distribution, bathtub, fault, transient, permanent, intermittent, behavior, type, description, signalization, scenario, tripple modular redundancy, TMR

Autoři

STRNADEL, J.

Vydáno

20. 4. 2016

Nakladatel

Slovak University of Technology in Bratislava

Místo

Bratislava

ISBN

978-80-8086-256-5

Kniha

Informal Proceedings of the 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)

Strany od

32

Strany do

37

Strany počet

6

URL

https://www.fit.vut.cz/research/publication/11073/

BibTex

@inproceedings{BUT130933,
  author="Josef {Strnadel}",
  title="Modeling and Analysis of Fault-Tolerant Systems by Means of UPPAAL SMC: Method and Benefits",
  booktitle="Informal Proceedings of the 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)",
  year="2016",
  pages="32--37",
  publisher="Slovak University of Technology in Bratislava",
  address="Bratislava",
  isbn="978-80-8086-256-5",
  url="https://www.fit.vut.cz/research/publication/11073/"
}

Dokumenty

strnadel_cr03_web.pdf