Detail publikace

Augmented Digital Zero Crossing Timing Error Detector

ŠEBESTA, J.

Originální název

Augmented Digital Zero Crossing Timing Error Detector

Typ

článek ve sborníku ve WoS nebo Scopus

Jazyk

angličtina

Originální abstrakt

Improvements of data timing synchronization algorithms applying an augmentation of zero cross error detector are presented in this paper. Describing methods are destined for high speed PSK coherent demodulator. Timing error synchronizers are usually the most complicated subsystems in the demodulator, and they can be often limitary for their implementation in the DSP hardware above all for high-rate data transmission. This contribution is focused on feedback timing estimators based on ML-criterion. There are analyzed a modification of zero crossing detection and shown an easy implementation into DSP system.

Klíčová slova

Timing error detector, Data decision, Coherent detector, Maximum likelihood, Synchronization

Autoři

ŠEBESTA, J.

Rok RIV

2008

Vydáno

15. 12. 2008

Nakladatel

WSEAS Press

Místo

Puerto de la Cruz, Spain

ISBN

978-960-474-035-2

Kniha

Proceedings of the 7th WSEAS International Conference on Circuits, Systems, Electronics, Control and Signal Processing 2008.

Edice

1

Číslo edice

1

Strany od

261

Strany do

264

Strany počet

4

BibTex

@inproceedings{BUT29601,
  author="Jiří {Šebesta}",
  title="Augmented Digital Zero Crossing Timing Error Detector",
  booktitle="Proceedings of the 7th WSEAS International Conference on Circuits, Systems, Electronics, Control and Signal Processing 2008.",
  year="2008",
  series="1",
  number="1",
  pages="261--264",
  publisher="WSEAS Press",
  address="Puerto de la Cruz, Spain",
  isbn="978-960-474-035-2"
}