Detail publikace

Optimization of FIR filter implementation for FMT on VLIW DSP

SYSEL, P. KRAJSA, O.

Originální název

Optimization of FIR filter implementation for FMT on VLIW DSP

Typ

článek ve sborníku ve WoS nebo Scopus

Jazyk

angličtina

Originální abstrakt

The paper summarizes the FMT modulation prototype filter design and its efficient implementation on DSP. The optimum design of algorithms for digital signal processors with VLIW architecture is described. Using this new approach it was, for example, possible to optimize compilation from the C language into the assembler of TMS320C6414 digital signal processor for implementation of FMT modulation with prototype FIR filter. The method consists in a closer linkage between the theory of digital signal processing, software tools and hardware.

Klíčová slova

Assembler Programming, Digital Signal Processor, Filtered MultiTone Modulation, Prototype Filter, State-Space Representation, Very Long Instruction Word.

Autoři

SYSEL, P.; KRAJSA, O.

Rok RIV

2010

Vydáno

22. 7. 2010

Nakladatel

WSEAS Press

Místo

Corfu

ISBN

978-960-474-208-0

Kniha

Proceedings of the 4th International Conference on Circuits, Systems and Signals (CSS'10)

Edice

1

Číslo edice

1

Strany od

169

Strany do

173

Strany počet

5

BibTex

@inproceedings{BUT34356,
  author="Petr {Sysel} and Ondřej {Krajsa}",
  title="Optimization of FIR filter implementation for FMT on VLIW DSP",
  booktitle="Proceedings of the 4th International Conference on Circuits, Systems and Signals (CSS'10)",
  year="2010",
  series="1",
  number="1",
  pages="169--173",
  publisher="WSEAS Press",
  address="Corfu",
  isbn="978-960-474-208-0"
}