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YOUNES, D. ŠTEFFAN, P.
Originální název
TWO MODULO 2n +/- 1 ADDERS BASED ON PREFIX COMPUTATION
Typ
článek ve sborníku ve WoS nebo Scopus
Jazyk
angličtina
Originální abstrakt
Two novel designs of residue number system adders corresponding moduli 2n–1, 2n+1 are presented in this paper. Both designs are based on prefix computation idea, which was inspired from the technique used in carry look-ahead adder (CLA). This prefix computation speeds up the addition-correction process corresponding to each modulo. The proposed modular adders were designed in such a way to be efficiently implemented on Spartan-3 field programmable gate array (FPGA) board. The implementation results showed time, area savings up to 44.7%, 14.3%, respectively, which indicates that these adders are very effective for designs with critical timing requirements.
Klíčová slova
Residue Number System, modulo 2n+/-1 adders, FPGA, prefix carry computation
Autoři
YOUNES, D.; ŠTEFFAN, P.
Rok RIV
2011
Vydáno
19. 5. 2011
ISBN
978-80-214-4404-1
Kniha
IMAPS - Mikroelektronika současnosti
Strany od
1
Strany do
6
Strany počet
BibTex
@inproceedings{BUT88544, author="Dina {Younes} and Pavel {Šteffan}", title="TWO MODULO 2n +/- 1 ADDERS BASED ON PREFIX COMPUTATION", booktitle="IMAPS - Mikroelektronika současnosti", year="2011", pages="1--6", isbn="978-80-214-4404-1" }