Grantová agentura České republiky - Standardní projekty

- plně financující (2010-01-01 - 2013-12-31)

GAP103/10/1517

čeština

Sekanina Lukáš, prof. Ing., Ph.D. - hlavní řešitel
Bidlo Michal, doc. Ing., Ph.D. - spoluřešitel
Dobai Roland, Ing., Ph.D. - spoluřešitel
Dvořák Václav, prof. Ing., DrSc. - spoluřešitel
Jaroš Jiří, doc. Ing., Ph.D. - spoluřešitel
Růžička Richard, doc. Ing., Ph.D., MBA - spoluřešitel
Schwarz Josef, doc. Ing., CSc. - spoluřešitel

Fakulta informačních technologií
- příjemce (01.01.2010 - 31.12.2013)

POSPÍCHAL, P.; JAROŠ, J.; SCHWARZ, J. Parallel Genetic Algorithm on the CUDA Architecture. In Applications of Evolutionary Computation. Lecture Notes in Computer Science. Berlin Heidelberg: Springer Verlag, 2010. p. 442-451. ISBN: 978-3-642-12238-5.
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ŠIMEK, V.; RŮŽIČKA, R.; SEKANINA, L. On Analysis of Fabricated Polymorphic Circuits. Proc. of the 13th Int. IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems. Vienna: IEEE Computer Society, 2010. p. 281-284. ISBN: 978-1-4244-6610-8.
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POSPÍCHAL, P.; SCHWARZ, J.; JAROŠ, J. Parallel Genetic Algorithm Solving 0/1 Knapsack Problem Running on the GPU. In 16th International Conference on Soft Computing MENDEL 2010. Brno: Brno University of Technology, 2010. p. 64-70. ISBN: 978-80-214-4120-0.
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JAROŠ, J.; DVOŘÁK, V. Evolutionary-Based Conflict-Free Scheduling of Collective Communications on Spidergon NoCs. In Proceedings of the 12th Annual Genetic and Evolutionary Computation Conference, GECCO '10. New York: Association for Computing Machinery, 2010. p. 1171-1178. ISBN: 978-1-4503-0072-8.
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BIDLO, M.; VAŠÍČEK, Z.; SLANÝ, K. Sorting Network Development Using Cellular Automata. In Evolvable Systems: From Biology to Hardware. 9th International Conference, ICES 2010, York, UK, September 6-8, 2010, Proceedings, LNCS 6274. London: Springer London, 2010. p. 85-96. ISBN: 978-3-642-15322-8.
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ŠIMÁČEK, J.; SEKANINA, L.; STAREČEK, L. Evolutionary Design of Reconfiguration Strategies to Reduce the Test Application Time. Evolvable Systems: From Biology to Hardware. Lecture Notes in Computer Science. Berlin: Springer Verlag, 2010. p. 214-225. ISBN: 978-3-642-15322-8.
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SALVADOR, R.; MORENO, F.; RIESGO, T.; SEKANINA, L. High level validation of an optimization algorithm for the implementation of adaptive Wavelet Transforms in FPGAs. Proc. of 13th Euromicro Conference on Digital System Design. Los Alamitos: IEEE Computer Society, 2010. p. 96-103. ISBN: 978-0-7695-4171-6.
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POSPÍCHAL, P. GPU-Based Acceleration of the Genetic Algorithm. Počítačové architektury a diagnostika 2010. Brno: Faculty of Information Technology BUT, 2010. p. 75-80. ISBN: 978-80-214-4140-8.
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ŽALOUDEK, L. Výpočetní systémy založené na celulárních automatech. Počítačové architektury a diagnostika 2010. Brno: Fakulta informačních technologií VUT v Brně, 2010. s. 177-182. ISBN: 978-80-214-4140-8.
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SALVADOR, R.; MORENO, F.; RIESGO, T.; SEKANINA, L. Implementation of bio-inspired adaptive wavelet transforms in FPGAs. Modelling, validation and profiling of the algorithm. Proceedings of the XXV Conference on Design of Circuits and Integrated Systems. Lanzarote: The Universidad de Las Palmas de Gran Canaria, 2010. p. 210-215. ISBN: 978-84-693-7393-4.
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VAŠÍČEK, Z. Využití a akcelerace evolučních technik pro návrh číslicových obvodů. Počítačové architektury a diagnostika 2010. Brno: Fakulta informačních technologií VUT v Brně, 2010. s. 165-170. ISBN: 978-80-214-4140-8.
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VAŠÍČEK, Z.; SEKANINA, L.; BIDLO, M. A Method for Design of Impulse Bursts Noise Filters Optimized for FPGA Implementations. DATE 2010: Design, Automation and Test in Europe. Dresden: European Design and Automation Association, 2010. p. 1731-1736. ISBN: 978-3-9810801-6-2.
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FIŠER, P.; SCHMIDT, J.; VAŠÍČEK, Z.; SEKANINA, L. On Logic Synthesis of Conventionally Hard to Synthesize Circuits Using Genetic Programming. Proc. of the 13th Int. IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems. Vienna: IEEE Computer Society, 2010. p. 346-351. ISBN: 978-1-4244-6610-8.
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DVOŘÁK, V. Multi-Terminal BDDs in Microprocessor-Based Control. Proceedings ICINCO 2010. Funchal, Madeira: Institute for Systems and Technologies of Information, Control and Communication, 2010. p. 140-145. ISBN: 978-989-8425-02-7.
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SALVADOR, R.; MORENO, F.; RIESGO, T.; SEKANINA, L. Evolutionary design and optimization of Wavelet Transforms for image compression in embedded systems. Proc. of the 2010 NASA/ESA Conference on Adaptive Hardware and Systems. Los Alamitos: IEEE Computer Society, 2010. p. 177-184. ISBN: 978-1-4244-5888-2.
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BIDLO, M.; SEKANINA, L. On Impact of Environment on the Complexity Generated by Evolutionary Development. In MENDEL 2010 - 16th International Conference on Soft Computing. Brno: Faculty of Mechanical Engineering BUT, 2010. p. 501-508. ISBN: 978-80-214-4120-0.
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GAJDA, Z.; SEKANINA, L. When Does Cartesian Genetic Programming Minimize the Phenotype Size Implicitly?. Proceeding of Genetic and Evolutionary Computation Conference, GECCO 2010. New York: Association for Computing Machinery, 2010. p. 983-984. ISBN: 978-1-4503-0072-8.
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POSPÍCHAL, P. GPU-Based Acceleration of the Genetic Algorithm. Proceedings of the 16th Conference Student EEICT 2010 Volume 5. Brno: Faculty of Information Technology BUT, 2010. p. 234-238. ISBN: 978-80-214-4080-7.
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GAJDA, Z.; SEKANINA, L. An Efficient Selection Strategy for Digital Circuit Evolution. Evolvable Systems: From Biology to Hardware. Lecture Notes in Computer Science. Berlin: Springer Verlag, 2010. p. 13-24. ISBN: 978-3-642-15322-8.
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KORČEK, P. Simulácie dopravy a ich akcelerácia. Počítačové architektury a diagnostika 2010. Brno: Department of Computer Systems FIT BUT, 2010. s. 63-68. ISBN: 978-80-214-4140-8.
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KORČEK, P.; SEKANINA, L.; FUČÍK, O. Towards Scalable and Accurate Microscopic Traffic Simulation Using Advanced Cellular Automata Based Models. Proceedings of the 13th International IEEE Conference on Intelligent Transportation Systems Workshops. Madeira Island: IEEE Intelligent Transportation Systems Society, 2010. p. 27-35. ISBN: 978-972-8822-20-0.
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RŮŽIČKA, R. On Practical Aspects of Printable Polymer and Nanometal Logic. Proceedings of CSE2010 - International Scientific Conference on Computer Science and Engineering. Košice: The University of Technology Košice, 2010. p. 202-207. ISBN: 978-80-8086-164-3.
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ŽALOUDEK, L.; SEKANINA, L.; ŠIMEK, V. Accelerating Cellular Automata Evolution on Graphics Processing Units. International Journal on Advances in Software, 2010, vol. 3, no. 1, p. 294-303. ISSN: 1942-2628.
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DVOŘÁK, V.; MIKUŠEK, P. Design of Arbiters and Allocators Based on Multi-Terminal BDDs. Journal of Universal Computer Science, 2010, vol. 16, no. 14, p. 1826-1852. ISSN: 0948-6968.
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SEKANINA, L. Evoluční návrh hardware. In Umelá inteligencia a kognitívna veda II. Edícia výskumných textov FIIT STU. Bratislava: Vydavateľstvo STU, 2010. s. 437-465. ISBN: 978-80-227-3284-0.
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JAROŠ, J. Evolutionary Design of Collective Communications on Wormhole Networks. Brno: Publishing house of Brno University of Technology VUTIUM, 2010. 183 p. ISBN: 978-80-214-4208-5.
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BIDLO, M. Evolutionary Design of Generic Structures Using Instruction-Based Development. Brno: Faculty of Information Technology BUT, 2010. 124 p. ISBN: 978-80-214-4210-8.
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DVOŘÁK, V.; JAROŠ, J. A Programmable Interconnection Network for Multiple Communication Patterns. Proceedings of the Sixth International Conference on Systems, ICONS 2011. St. Maarten: International Academy, Research, and Industry Association, 2011. p. 6-11. ISBN: 978-1-61208-002-4.
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JAROŠ, J.; DVOŘÁK, V. Optimizing Collective Communications on the K-port Spidergon Network. Proceedings of the Sixth International Conference on Systems, ICONS 2011. St. Maarten: International Academy, Research, and Industry Association, 2011. p. 24-29. ISBN: 978-1-61208-002-4.
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KORČEK, P.; SEKANINA, L.; FUČÍK, O. Cellular automata based traffic simulation accelerated on GPU. Proceedings of the 17th International Conference on Soft Computing (MENDEL2011). Brno: Institute of Automation and Computer Science FME BUT, 2011. p. 395-402. ISBN: 978-80-214-4302-0.
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SALVADOR, R.; MORENO, F.; RIESGO, T.; SEKANINA, L. Evolutionary Approach to Improve Wavelet Transforms for Image Compression in Embedded Systems. EURASIP Journal on Advances in Signal Processing, 2011, vol. 2011, no. 2011, p. 1-20. ISSN: 1687-6172.
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VAŠÍČEK, Z.; SEKANINA, L. A Global Postsynthesis Optimization Method for Combinational Circuits. Proc. of the Design, Automation and Test in Europe DATE 2011. Grenoble: European Design and Automation Association, 2011. p. 1525-1528. ISBN: 978-3-9810801-7-9.
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KORČEK, P.; SEKANINA, L.; FUČÍK, O. A Scalable Cellular Automata Based Microscopic Traffic Simulation. Proceedings of the IEEE Intelligent Vehicles Symposium 2011 (IV11). Baden-Baden: IEEE Intelligent Transportation Systems Society, 2011. p. 13-18. ISBN: 978-1-4577-0889-3.
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DVOŘÁK, V.; MIKUŠEK, P. On the cascade realization of sparse logic functions. Euromicro Proceedings. Oulu: IEEE Computer Society, 2011. p. 21-28. ISBN: 978-0-7695-4494-6.
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RŮŽIČKA, R.; ŠIMEK, V.; SEKANINA, L. Behavior of CMOS Polymorphic Circuits in High Temperature Environment. Proceedings of the 2011 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems. Cottbus: IEEE Computer Society, 2011. p. 447-452. ISBN: 978-1-4244-9753-9.
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GAJDA, Z.; SEKANINA, L. On Evolutionary Synthesis of Compact Polymorphic Combinational Circuits. JOURNAL OF MULTIPLE-VALUED LOGIC AND SOFT COMPUTING, 2011, vol. 17, no. 6, p. 607-631. ISSN: 1542-3980.
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POSPÍCHAL, P.; SCHWARZ, J. Effective Mapping of Grammatical Evolution to CUDA Hardware Model. Proceedings of the 17th Conference Student EEICT 2011 Volume 3. Brno: Brno University of Technology, 2011. p. 574-578. ISBN: 978-80-214-4273-3.
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KORČEK, P.; SEKANINA, L.; FUČÍK, O. Microscopic traffic simulation using CUDA. Advanced Computer Architecture and Compilation for High-Performace and Embedded Systems (ACACES 2011) Poster Abstracts. Fiuggi: Academia Press, 2011. p. 207-210. ISBN: 978-90-382-1798-7.
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KORČEK, P. Simulácie dopravy pre dlhodobú predpoveď stavu dopravy. Počítačové architektury a diagnostika 2011. Bratislava: Faculty of Informatics and Information Technology Slovak University of Technology in Bratislava, 2011. s. 115-120. ISBN: 978-80-227-3552-0.
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MINAŘÍK, M.; SEKANINA, L. Evolution of Iterative Formulas Using Cartesian Genetic Programming. Lecture Notes in Computer Science, 2011, vol. 2011, no. 6881, p. 11-20. ISSN: 0302-9743.
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MIKUŠEK, P.; TOMEC, M.; DVOŘÁK, V. A Cascade Decomposition of Application-Specific Systems. MEMICS Proc. Brno: Brno University of Technology, 2011. p. 78-85. ISBN: 978-80-214-4305-1.
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SEKANINA, L. Evolutionary hardware design (Invited Paper). VLSI Circuits and Systems V. Proc. of SPIE Vol. 8067. Bellingham: SPIE - the international society for optics and photonics, 2011. p. 1-11. ISBN: 978-0-8194-8656-1.
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SALVADOR, R.; VIDAL, A.; MORENO, F.; RIESGO, T.; SEKANINA, L. Bio-inspired FPGA architecture for self-calibration of an image compression core based on wavelet transforms in embedded systems. VLSI Circuits and Systems V. Proc. of SPIE Vol. 8067. Bellingham: SPIE - the international society for optics and photonics, 2011. p. 1-13. ISBN: 978-0-8194-8656-1.
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ŽALOUDEK, L.; SEKANINA, L. Increasing Fault-Tolerance in Cellular-Based Systems. Lecture Notes in Computer Science, 2011, vol. 2011, no. 6714, p. 234-245. ISSN: 0302-9743.
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VAŠÍČEK, Z.; BIDLO, M.; SEKANINA, L.; GLETTE, K. Evolutionary Design of Efficient and Robust Switching Image Filters. In Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems. Los Alamitos: IEEE Computer Society, 2011. p. 192-199. ISBN: 978-1-4577-0599-1.
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OTERO, A.; SALVADOR, R.; MORA, J.; DE LA TORRE, E.; RIESGO, T.; SEKANINA, L. A Fast Reconfigurable 2D HW Core Architecture on FPGAs for Evolvable Self-Adaptive Systems. Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems. Los Alamitos: IEEE Computer Society, 2011. p. 336-343. ISBN: 978-1-4577-0599-1.
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SALVADOR, R.; OTERO, A.; MORA, J.; DE LA TORRE, E.; RIESGO, T.; SEKANINA, L. Evolvable 2D computing matrix model for intrinsic evolution in commercial FPGAs with native reconfiguration support. Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems. Los Alamitos: IEEE Computer Society, 2011. p. 184-191. ISBN: 978-1-4577-0599-1.
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RŮŽIČKA, R.; ŠIMEK, V. On Properties of Basic Building Blocks for Printable Polymer and Nanometal Logic. Proc. of IMAPS CS International Conference on Electronic Devices and Systems. Brno: Brno University of Technology, 2011. p. 258-263. ISBN: 978-80-214-4303-7.
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VAŠÍČEK, Z.; SEKANINA, L. Formal verification of candidate solutions for post-synthesis evolutionary optimization in evolvable hardware. Genetic Programming and Evolvable Machines, 2011, vol. 12, no. 3, p. 305-327. ISSN: 1389-2576.
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SCHWARZ, J.; POSPÍCHAL, P. Optimizing Code for Graphics Processing Units. Počítačové architektury a diagnostika 2011. Bratislava: Slovak University of Technology in Bratislava, 2011. p. 79-84. ISBN: 978-80-227-3552-0.
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SEKANINA, L.; VAŠÍČEK, Z. CGP Acceleration Using Field-Programmable Gate Arrays. In Cartesian Genetic Programming. Natural Computing Series. Berlin: Springer Verlag, 2011. p. 217-230. ISBN: 978-3-642-17309-7.
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SEKANINA, L.; HARDING, S.; BANZHAF, W.; KOWALIW, T. Image Processing and CGP. In Cartesian Genetic Programming. Natural Computing Series. Berlin: Springer Verlag, 2011. p. 181-215. ISBN: 978-3-642-17309-7.
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SEKANINA, L.; WALKER, J.; KAUFMANN, P.; PLATZNER, M. Evolution of Electronic Circuits. In Cartesian Genetic Programming. Natural Computing Series. Berlin: Springer Verlag, 2011. p. 125-179. ISBN: 978-3-642-17309-7.
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VAŠÍČEK, Z.; BIDLO, M. Evolutionary Design of Robust Noise-Specific Image Filters. In 2011 IEEE Congress on Evolutionary Computation. New Orleans: IEEE Computer Society, 2011. p. 269-276. ISBN: 978-1-4244-7834-7.
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POSPÍCHAL, P.; SCHWARZ, J.; JAROŠ, J. Acceleration of grammatical evolution using graphics processing units: computational intelligence on consumer games and graphics hardware. In Genetic and Evolutionary Computation Conference, GECCO'11 - Companion Publication. New York: Association for Computing Machinery, 2011. p. 431-438. ISBN: 978-1-4503-0690-4.
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ŽALOUDEK, L. Permanent Errors May Contribute to Emergent Behavior in One-Dimensional Cellular Automata. Proceedings of the 2011 Third World Congress on Nature and Biologically Inspired Computing. Salamanca: Institute of Electrical and Electronics Engineers, 2011. p. 58-63. ISBN: 978-1-4577-1123-7.
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JAROŠ, J.; DVOŘÁK, V. Evolutionary Design of Collective Communications on Wormhole NoCs. In Autonomic Networking-On-Chip: Bio-Inspired Specification, Development, and Verification. Embedded Multi-Core Systems. London: CRC Press LLC, 2011. p. 60-94. ISBN: 978-1-4398-2911-0.
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SEKANINA, L.; KOMENDA, T. Global Control in Polymorphic Cellular Automata. Journal of Cellular Automata, 2011, vol. 6, no. 4, p. 301-321. ISSN: 1557-5969.
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ŽALOUDEK, L. Vliv defektů a zvyšování odolnosti proti poruchám v celulárních systémech. Počítačové architektury a diagnostika 2011. Bratislava: Vydavateľstvo STU, 2011. s. 145-150. ISBN: 978-80-227-3552-0.
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SALVADOR, R.; OTERO, A.; MORA, J.; DE LA TORRE, E.; SEKANINA, L.; RIESGO, T. Fault Tolerance Analysis and Self-Healing Strategy of Autonomous, Evolvable Hardware Systems. Proc. of the 2011 International Conference on ReConFigurable Computing and FPGAs. Los Alamitos: IEEE Computer Society, 2011. p. 164-169. ISBN: 978-0-7695-4551-6.
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GAJDA, Z.; SEKANINA, L. Recent Advances in Evolutionary Synthesis and Optimization of Ordinary and Polymorphic Circuits. Brno: Faculty of Information Technology BUT, 2011. 111 p. ISBN: 978-80-214-4417-1.
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PETRLÍK, J.; KORČEK, P.; FUČÍK, O.; BESZÉDEŠ, M.; SEKANINA, L. Estimation of traffic density map using evolutionary algorithm. In Proceedings of the 15th International IEEE Conference on Intelligent Transportation Systems. Anchorage: IEEE Intelligent Transportation Systems Society, 2012. p. 632-637. ISBN: 978-1-4673-3062-6.
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DVOŘÁK, V. Branching Program-Based Programmable Logic for Embedded Systems. Proceedings of ICONS 2012. New York: International Academy, Research, and Industry Association, 2012. p. 109-115. ISBN: 978-1-61208-184-7.
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SEKANINA, L.; SALAJKA, V. Towards New Applications of Multi-Function Logic: Image Multi-Filtering. Proc. of the 2012 Design, Automation and Test in Europe. Dresden: European Design and Automation Association, 2012. p. 824-827. ISBN: 978-1-4577-2145-8.
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SEKANINA, L.; VAŠÍČEK, Z. A SAT-based Fitness Function for Evolutionary Optimization of Polymorphic Circuits. Proc. of the 2012 Design, Automation and Test in Europe. Dresden: European Design and Automation Association, 2012. p. 715-720. ISBN: 978-1-4577-2145-8.
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DVOŘÁK, V. O složitosti a optimalizaci větvících programů pro stroje DDM. Programmable Devices and Embedded Systems PDeS 2012. Programmable devices and systems. Brno: Faculty of Electrical Engineering and Communication BUT, 2012. s. 84-89. ISBN: 978-3-902823-21-2. ISSN: 1474-6670.
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JAROŠ, J.; POSPÍCHAL, P. A Fair Comparison of Modern CPUs and GPUs Running the Genetic Algorithm under the Knapsack Benchmark. Lecture Notes in Computer Science, 2012, vol. 2012, no. 7248, p. 426-435. ISSN: 0302-9743.
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DRAHOŠOVÁ, M.; SEKANINA, L. Coevolution in Cartesian Genetic Programming. Proc. of the 15th European Conference on Genetic Programming. Lecture Notes in Computer Science. Heidelberg: Springer Verlag, 2012. p. 182-193. ISBN: 978-3-642-29138-8.
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RŮŽIČKA, R.; ŠIMEK, V. NAND/NOR Gate Polymorphism in Low Temperature Environment. Proceedings of the 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems. Tallinn: Institute of Electrical and Electronics Engineers, 2012. p. 34-37. ISBN: 978-1-4673-1185-4.
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SEKANINA, L.; SALAJKA, V.; VAŠÍČEK, Z. Two-Step Evolution of Polymorphic Circuits for Image Multi-Filtering. In 2012 IEEE World Congress on Computational Intelligence. CA: Institute of Electrical and Electronics Engineers, 2012. p. 432-439. ISBN: 978-1-4673-1508-1.
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JAROŠ, J. Multi-GPU Island-Based Genetic Algorithm Solving the Knapsack Problem. In 2012 IEEE Congress on Evolutionary Computation, CEC 2012. CA: Institute of Electrical and Electronics Engineers, 2012. p. 217-224. ISBN: 978-1-4673-1508-1.
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VAŠÍČEK, Z.; SEKANINA, L. On Area Minimization of Complex Combinational Circuits Using Cartesian Genetic Programming. In 2012 IEEE World Congress on Computational Intelligence. CA: Institute of Electrical and Electronics Engineers, 2012. p. 2379-2386. ISBN: 978-1-4673-1508-1.
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BIDLO, M.; VAŠÍČEK, Z. Evolution of Cellular Automata Using Instruction-Based Approach. In 2012 IEEE World Congress on Computational Intelligence. CA: Institute of Electrical and Electronics Engineers, 2012. p. 1060-1067. ISBN: 978-1-4673-1508-1.
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KORČEK, P.; SEKANINA, L.; FUČÍK, O. Evolutionary approach to calibration of cellular automaton based traffic simulation model. In Proceedings of the 15th International IEEE Conference on Intelligent Transportation Systems. Anchorage: IEEE Intelligent Transportation Systems Society, 2012. p. 122-129. ISBN: 978-1-4673-3062-6.
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SALVADOR, R.; VIDAL, A.; MORENO, F.; RIESGO, T.; SEKANINA, L. Accelerating FPGA-based evolution of wavelet transform filters by optimized task scheduling. Microprocessors and Microsystems, 2012, vol. 36, no. 5, p. 427-438. ISSN: 0141-9331.
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DRAHOŠOVÁ, M.; SEKANINA, L. Acceleration of Evolutionary Image Filter Design Using Coevolution in Cartesian GP. Lecture Notes in Computer Science, 2012, vol. 2012, no. 7491, p. 163-172. ISSN: 0302-9743.
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KORČEK, P.; SEKANINA, L.; FUČÍK, O. Calibrating Traffic Simulation Model using Vehicle Travel Times. Lecture Notes in Computer Science, 2012, vol. 2012, no. 7495, p. 807-816. ISSN: 0302-9743.
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BIDLO, M.; VAŠÍČEK, Z. Cellular Automaton as a Sorting Network Generator Using Instruction-Based Development. Lecture Notes in Computer Science, 2012, vol. 2012, no. 7495, p. 214-223. ISSN: 0302-9743.
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VAŠÍČEK, Z.; SLANÝ, K. Efficient Phenotype Evaluation in Cartesian Genetic Programming. In Proc. of the 15th European Conference on Genetic Programming. Lecture Notes in Computer Science. Heidelberg: Springer Verlag, 2012. p. 266-278. ISBN: 978-3-642-29138-8.
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RŮŽIČKA, R.; ŠIMEK, V. Polymeric Polymorphic Electronics: Towards Multifunctional Logic Elements Based on Organic Semiconductor Materials. Proceedings of CSE 2012 International Scientific Conference on Computer Science and Engineerig. Košice: Faculty of Electrical Engineering and Informatics, University of Technology Košice, 2012. p. 154-161. ISBN: 978-80-8143-049-7.
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ŽALOUDEK, L.; SEKANINA, L. Cellular automata-based systems with fault-tolerance. Natural Computing, 2012, vol. 11, no. 4, p. 673-685. ISSN: 1567-7818.
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VAŠÍČEK, Z.; BIDLO, M.; SEKANINA, L. Evolution of efficient real-time non-linear image filters for FPGAs. SOFT COMPUTING, 2013, vol. 17, no. 11, p. 2163-2180. ISSN: 1432-7643.
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SALVADOR, R.; OTERO, A.; MORA, J.; DE LA TORRE, E.; RIESGO, T.; SEKANINA, L. Self-Reconfigurable Evolvable Hardware System for Adaptive Image Processing. IEEE TRANSACTIONS ON COMPUTERS, 2013, vol. 62, no. 8, p. 1481-1493. ISSN: 0018-9340.
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SEKANINA, L. Ubiquity symposium: Evolutionary computation and the processes of life: evolutionary computation in physical world. Ubiquity, 2013, vol. 2013, no. 2, p. 1-7. ISSN: 1530-2180.
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SEKANINA, L.; RŮŽIČKA, R.; VAŠÍČEK, Z.; ŠIMEK, V.; HANÁČEK, P. Implementing a Unique Chip ID on a Reconfigurable Polymorphic Circuit. Information Technology and Control, 2013, vol. 42, no. 1, p. 7-14. ISSN: 1392-124X.
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BIDLO, M.; VAŠÍČEK, Z. Evolution of Cellular Automata with Conditionally Matching Rules. In 2013 IEEE Congress on Evolutionary Computation (CEC 2013). Cancún: IEEE Computer Society, 2013. p. 1178-1185. ISBN: 978-1-4799-0452-5.
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DOBAI, R.; SEKANINA, L. Towards Evolvable Systems Based on the Xilinx Zynq Platform. 2013 IEEE International Conference on Evolvable Systems (ICES). Proceedings of the 2013 IEEE Symposium Series on Computational Intelligence (SSCI). Singapur: IEEE Computational Intelligence Society, 2013. p. 89-95. ISBN: 978-1-4673-5869-9.
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MINAŘÍK, M.; SEKANINA, L. Concurrent Evolution of Hardware and Software for Application-Specific Microprogrammed Systems. 2013 IEEE International Conference on Evolvable Systems (ICES). Proceedings of the 2013 IEEE Symposium Series on Computational Intelligence (SSCI). Singapur: IEEE Computational Intelligence Society, 2013. p. 43-50. ISBN: 978-1-4673-5869-9.
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SEKANINA, L.; VAŠÍČEK, Z. Approximate Circuit Design by Means of Evolvable Hardware. In 2013 IEEE International Conference on Evolvable Systems (ICES). Proceedings of the 2013 IEEE Symposium Series on Computational Intelligence (SSCI). Singapur: IEEE Computer Society, 2013. p. 21-28. ISBN: 978-1-4673-5847-7.
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PETRLÍK, J.; SEKANINA, L. Multiobjective evolution of approximate multiple constant multipliers. In IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems 2013. Brno: IEEE Computer Society, 2013. p. 116-119. ISBN: 978-1-4673-6133-0.
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BIDLO, M.; VAŠÍČEK, Z. Functional-Level Development of Image Filters by Means of Cellular Automata. In 2013 IEEE International Conference on Evolvable Systems (ICES). Proceedings of the 2013 IEEE Symposium Series on Computational Intelligence (SSCI). Singapore: IEEE Computer Society, 2013. p. 29-36. ISBN: 978-1-4673-5847-7.
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HRBÁČEK, R.; DRAHOŠOVÁ, M. Coevolutionary Cartesian Genetic Programming in FPGA. Advances in Artificial Life, ECAL 2013, Proceedings of the Twelfth European Conference on the Synthesis and Simulation of Living Systems. Cambridge: MIT Press, 2013. p. 431-438. ISBN: 978-0-262-31709-2.
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ŠIMEK, V.; RŮŽIČKA, R. More Complex Polymorphic Circuits and Their Physical Implementation. Proceedings of the 20th Electronic Devices and Systems IMAPS CS International Conference. Brno: Brno University of Technology, 2013. p. 189-194. ISBN: 978-80-214-4754-7.
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DVOŘÁK, V.; MIKUŠEK, P. Easily Reprogrammable Embedded Logic Control. Proceedings of ICINCO 2013, Vol.1. Lisbon: SciTePress - Science and Technology Publications, 2013. p. 471-476. ISBN: 978-989-8565-70-9.
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DVOŘÁK, V.; MIKUŠEK, P. Memory-Based Logic Control for Embedded Systems. Lecture notes in Electrical Engineering, 2015, vol. 325, no. 1, p. 367-379. ISSN: 1876-1100.
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VRÁNSKY, R.; SCHWARZ, J. Content based spam filtering algorithm:Experimental study. 19th International Conference on Soft Computing, Mendel 2013. Brno: Faculty of Mechanical Engineering BUT, 2013. p. 277-282. ISBN: 978-80-214-4755-4.
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KORČEK, P.; SEKANINA, L.; FUČÍK, O. Advanced Approach to Calibration of Traffic Microsimulation Models using Travel Times. Journal of Cellular Automata, 2013, vol. 8, no. 6, p. 457-467. ISSN: 1557-5969.
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RŮŽIČKA, R.; ŠIMEK, V. More Complex Polymorphic Circuits: A Way to Implementation of Smart Dependable Systems. ElectroScope - http://www.electroscope.zcu.cz, 2013, vol. 7, no. 5, p. 1-6. ISSN: 1802-4564.
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JAROŠ, J.: EvoCCs; EvoCCs - Tool for evolutionary design of broadcast and scatter based collective communications on wormhole networks. viz. níže. URL: https://www.fit.vut.cz/research/product/173/. (software)
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BIDLO, M.: EvoSort; EvoSort - System for Evolutionary Development of Generic Sorting Networks. http://www.fit.vutbr.cz/research/view_product.php?id=178¬itle=1. URL: http://www.fit.vutbr.cz/research/view_product.php?id=178¬itle=1. (software)
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BIDLO, M.: EvoMult; EvoMult - System for Evolutionary Development of Generic Combinational Multipliers. http://www.fit.vutbr.cz/research/view_product.php?id=179¬itle=1. URL: http://www.fit.vutbr.cz/research/view_product.php?id=179¬itle=1. (software)
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BIDLO, M.: CASim; CASim - Cellular Automata Simulator. http://www.fit.vutbr.cz/~bidlom/CASim/. URL: http://www.fit.vutbr.cz/~bidlom/CASim/. (software)
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VAŠÍČEK, Z.: CGP-GENERATOR; Online CGP generator. Domovská stránka nástroje Online CGP Generator se nachází na adrese http://www.fit.vutbr.cz/~vasicek/cgp. . URL: https://www.fit.vut.cz/research/product/353/. (software)
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JAROŠ, J.: MPIGA 1.0; MPI Island-based CPU Implementation of GA Running the Knapsack Benchmark. https://github.com/jarosjir/MPI-GA-Knapsack. URL: https://github.com/jarosjir/MPI-GA-Knapsack. (software)
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JAROŠ, J.: MPIGPUGA 1.0; MPI Island-based GPU Implementation of GA Running the Knapsack Benchmark. viz níže. URL: https://www.fit.vut.cz/research/product/253/. (software)
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KORČEK, P.; FÜLÖP, T.: CA-traffic-simulator; Mikroskopický dopravní simulátor založen na celulárním automatu. http://www.fit.vutbr.cz/research/view_product.php?id=314. URL: http://www.fit.vutbr.cz/research/view_product.php?id=314. (software)
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JAROŠ, J.: GPUGA 1.0; GPGPU implementation of the GA running the knapsack benchmark. https://github.com/jarosjir/GPU-GA-Knapsack. URL: https://github.com/jarosjir/GPU-GA-Knapsack. (software)
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